JTAG

Do you know how to maximize the load and evaluate the Ethernet link's quality on your product? Our Quick Instruments portfolio has got a new Ethernet Stress Test instrument, which is able to test on-board Ethernet communication links from the FPGA through Ethernet PHYs and back. The instrument supports both the prototype validation and series production test scenarios.

We are proud to announce a new JTAG-operated embedded instrument for Bit-Error Rate Testing (BERT) of high-speed links on your UltrascalePlus-based products. The lightning-fast QI BERT instrument fits series/mass production scenarios whereas each and every PCBA can be checked for link quality issues using BER Eye diagrams. The latter is especially useful to identify those boards that albeit their correct operation in functional mode, still exhibit the signs of poor signal quality (due to presence of hidden defects).

Testonica updated the frequency measurement instrument to support gigahertz clocks on Zynq Ultrascale+ RFSoC devices as a part of its Quick Instruments portfolio.

Zynq Utrascale+ RFSoC is the latest adaptable radio platform from Xilinx, which combines FPGA reconfigurable logic, high-performance CPU cores, and multi-gigasample RF data converters modules inside a single chip. This RFSoC platform is used for building 5G wireless stations, radar-on-a-chip solutions, satellite applications, etc.

Testonica introduces a new instrument for testing SMBus communication busses and peripheral devices as a part of its Quick Instruments portfolio.

System Management Bus protocol is widely used for light-weight communication with on-board peripheral devices such as clock signal generators, power controllers, temperature/voltage sensors, etc. SMBus protocol was originally developed as an advanced version of well-known I²C protocol. By adding more strict timings, the SMBus protocol delivers a considerably higher performance and better stability than its I²C predecessor.

Testonica has been selected to cover the test technology part in a webinar on Nov 27 addressing the electronics production value chain in Estonia. The webinar and co-located mini-EXPO will focus on best practices and learnings shared by companies shaping the electronics industry for a new era of uncertainty.

Testonica was founded back in Oct 2005 when several fresh PhD graduates decided to convert their R&D experience into industrial technologies and products, which turned out to be very hard as the dreams were ambitious while commercial and industrial skills were missing. Still, the hard work and everyday learning by trial and error yielded their sweet fruits and made us finally see the great bright future coming!

Testonica's director Dr. Artur Jutman serves this year as the General Chair of the 2^nd International Test Standards Application Workshop (TESTA'2017). The TESTA workshop is a focused, open discussion platform dedicated to exchange of fresh ideas, industrial best practices, methodologies and work‐in‐progress around test related standards, especially those being actively developed today or the ones recently released.

The delivered solution enables quality evaluation of up to 10Gbit serial buses (PCIe Gen1/2/3, SATA, optical fiber channel, etc) with a help of powerful FPGA-embedded instrumentation technology. The technology is capable to measure Bit-Error Rate (BER) characteristic for high-speed digital data transmission links as well as to plot so-called BER eye diagram. The latter feature directly fits for mass-production testing since allows every manufactured product to be quickly checked for potential problems on high-speed channels.

Testonica Lab has released universal virtual embedded instrument IP capable to measure frequencies of high-speed clock signals connected to FPGA device. The developed technology offers an easy way of checking frequencies of on-board oscillators without the need of using any kind of external test and measurement equipment. The method does not involve usage of external nail probes or any other means of physical access to oscillator’s pin.

Artur Jutman, 10^th of November, Munich, exhibition grounds. "This is absolutely fantastic" - a typical feedback that I pleasantly hear from respected audience as we are displaying our Flash Accelerator IP and accompanyig software at the GOEPEL booth A1.351.

To be correct, GOEPEL electronic, a Jena, Germany based company is displaying the first ChipVORX^® product (an ultra fast flash programmer) that we at Testonica Lab have proudly developed in very tight cooperation with GOEPEL electronic's engineers.